1. Field of the Invention
The present invention relates to analysis of an electromagnetic field radiated from an electronic apparatus, and in particular relates to an electromagnetic field analysis apparatus, an electromagnetic field analysis method, and an electromagnetic field analysis computer program that are capable of decreasing the memory usage and the calculation time of a computer in simulating electromagnetic field distribution.
2. Discussion of the Background
As miniaturization and operational speeding up of electronic apparatuses progress, EMI (electromagnetic interference) noise radiated from the electronic apparatuses is increasing. Because EMI noise radiated from an electronic apparatus can cause an erroneous operation of a nearby electronic apparatus, generally a regulatory action is taken in various countries concerning radiation of EMI noise from electronic apparatuses. In the case where an EMI regulatory limitation is not respected, import and sale of the electronic apparatuses in the respective country may not be allowed. If an electronic apparatus planned for sale does not meet the EMI regulatory value or limitation, the import or sale of the apparatus can be stopped or postponed until the electronic apparatus meets the EMI regulatory value or limitation, thereby creating possible economic damage to the companies involved in the electronic apparatus.
Generally, in developing an electronic apparatus, after a prototype of the electronic apparatus has been completed, the EMI noise radiation level of the prototype is measured in an electromagnetic wave dark room for measuring EMI noise, and if the EMI noise radiation level exceeds a regulatory value, a countermeasure is taken to be incorporated in the prototype as a design change. The EMI noise radiation level of the prototype incorporating the countermeasure is measured again in the electromagnetic wave dark room, and if the EMI noise radiation level still exceeds the regulatory value, another countermeasure is taken. Thus, the measures against EMI noise are generally taken by a trial and error method.
Recently, as the processing speed of computers increases, it has become possible to simulate EMI noise radiation by computer calculation. However, simulating EMI noise radiation by computer calculation generally requires an enormous processing time of the computer, and even when a top-class commercial computer with a high speed CPU and a large memory is used, a relatively long time is required for the calculation. In a commercial simulator calculating 3-D electromagnetic field distribution, overflow is caused even by calculating a single 3-D electromagnetic field distribution of one printed circuit board normally mounted in an electronic apparatus. Therefore, the use of such simulators is usually limited to the case of calculating electromagnetic field distribution in the vicinity of a very small printed circuit boards.
To cope with the above-described problem, for example as described in Japanese Patent Laid-open publication No. 2004-54642, it has been proposed to enhance the calculation speed and the accuracy in simulating electromagnetic field distribution by dividing a simulation target object and performing parallel processing using a plurality of computers. However, as the miniaturization of printed circuit boards rapidly progresses, the width of a signal pattern is becoming smaller and the number of vias (holes performing connection between layers of a multi-layer printed circuit board) is increasing, so that even when a large number of computers are used for parallel processing, depending upon the size of a simulation target object, it may occur that the calculation cannot be performed due to overflowing. To avoid the overflowing, the number of computers must be increased, which is disadvantageous since it increases complexity and costs.
Japanese Patent Laid-open publication No. 2001-357093 describes a circuit simulation method, in which when analyzing transient responses of an electronic circuit, to enhance the analysis accuracy without increasing the analysis processing time, the analysis calculation is performed based on an analysis level, which is selected for each circuit block of the electronic circuit according to the accuracy required for the circuit block. The analysis level is changed for each circuit block by setting an arbitrary analysis time, so that detail analysis can be performed only for a circuit block requiring the high analysis accuracy. Further, a model parameter can be changed so that analysis processing is rapidly performed when giving greater importance to the processing time. In this method, however, when the number of circuit blocks requiring the high analysis accuracy is large, the processing time increases significantly. Further, in modeling an object that has to be analyzed, if the information regarding the object to be analyzed is randomly omitted to decrease the volume of processing, the analysis accuracy will be deteriorated.